How does computer perform subtraction

Understand that the SAME addition logic is used for signed and unsigned math, it is up to your code not the logic to virtually define if those bits were considered twos complement signed or unsigned. At the same time the carry out of that bit which is the C flag the carry flag, will not be set. Likewise a subtract with borrow, instead of feeding the carry in a 1 the carry in is either a 1 or 0 based on the state of the carry flag in the status register.

Multiplication is whole other story, binary makes multiplication much easier than when done with decimal math, but you DO have to have different unsigned and signed multiplication instructions. And division is its own separate beast, which is why most instruction sets do not have a divide. Many do not have a multiply because of the number of gates or clocks it burns.

You are a bit wrong in the sign bit part. It's not just a sign bit - every negative number is converted to 2's complement. If you write:. The ALU works the same for any combination of positive and negative values. Designers use a clever trick to make adders do both add and sub in the same cycle length by adding only a muxer and a NOT gate along with the new input Binvert in order to conditionally invert the second input.

Computer Architecture - Full Adder. That means we just need to set the carry in to 1 or negate the carry in for borrow in and invert the second input i. This type of ALU can be found in various computer architecture books like. However two's complement has another advantage: operations on signed and unsigned values also work the same, so you don't even need to distinguish between signed and unsigned types. For one's complement you'll need to add the carry bit back to the least significant bit if the type is signed.

CSE Multiple-bit operations are done by concatenating multiple single-bit ALUs above. In reality ALUs are able to do a lot more operations but they're made to save space with the similar principle.

It can be checked on a computer or on paper. Stack Overflow for Teams — Collaborate and share knowledge with a private group. We could rewrite the equation above as the following. Mathematically, it is exactly the same operation:. Now, given everything we have talked about up until this point, we already have all the skills and knowledge that we need to perform this sort of operation ourselves:.

That's all there is to negation. Once you know how to negate a value, it's easy to subtract B from A. You just negate B and then add to A. So most computers don't include a separate bunch of logic for subtraction which would take up space and cost money but just keep the same ADD capability. You need to know one more thing. How a basic ripple-carry adder works. Such an adder is built up of a bunch of one-bit adders chained to together. Each one-bit adder accepts one bit from A, a similar bit from B, and a carry-in that comes in from the carry-out of the next-lower-order one-bit adder.

Each one bit adder provides a one-bit sum and a carry-out. This is the exact same process you'd do by hand-adding the bits, very similarly to what you learn when adding in decimal. Now, this fact leaves out what happens for the lowest order bit. Well, with normal addition where there hasn't been a carry from a previous addition operation, the value for it is '0'.

This is what a normal ADD instruction does. There is also a special ADDC instruction, which "adds with carry", so that a carry from a previous ADD can be used in the sum of multiple-word answers. Now you are set up to understand how subtraction takes place. Flip Flops have both outputs available, readily. Then it just performs the same old ADD that it always does. A real implementation of an ALU adder will probably not use a ripple-carry adder.

Not because they don't work. They do. But because they are kind of slow. You have to wait for all those carry values to ripple over. So there are special "look ahead" methods for making the carry values work faster more than just one of these ideas. But the basic idea is all the same, regardless of the exact arrangements used.

And the SUB instruction does the same kind of trick in order to avoid having to build up completely different subtractor logic, when the adder can so easily be bent to do the same work. EDIT: Your table isn't correct for single-bit addition. FP overflow underflow refers to the positive negative exponent being too large for the number of bits alloted to it. This problem can be somewhat ameliorated by the use of double precision , whose format is shown as follows:.

Here, two bit words are combined to support an bit signed exponent and a bit significand. This representation is declared in C using the double datatype, and can support numbers with exponents ranging from 10 to The primary advantage is greater precision in the mantissa. The following chart illustrates specific types of overflow and underflow encountered in standard FP representation:.

Both single- and double-precision FP representations are supported by the IEEE Standard, which is used in the vast majority of computers since its publication in Otherwise, the sign is zero. A leading value of 1 in the significand is implicit for normalized numbers. Zero is represented by a zero significand and a zero exponent - there is no leading value of one in the significand.

As a parenthetical note, the significand can be translated into decimal values via the following expansion:. For example, consider the sorting of FP numbers. Another issue of interest in IEEE is biased notation for exponents. Observe that twos complement notation does not work for exponents: the largest negative positive exponent is 2 2. Thus, we must add a bias term to the exponent to center the range of exponents on the bias number, which is then equated to zero.

The bias term is for the IEEE single-precision double-precision representation. As a result, we have the following example of binary to decimal floating point conversion:. Decimal-to-binary FP conversion is somewhat more difficult. In Case 1, one selects the exponent as -log 2 d , and converts n to binary notation. Case 3 is more difficult, and will not be discussed here. Case 2 is exemplified in the following diagram:.

This yields the following representation in IEEE standard notation:. The following table summarizes special values that can be represented using the IEEE standard. Table 3. Special values in the IEEE standard. Of particular interest in the preceding table is the NaN not a number representation.

For example, when taking the square root of a negative number, or when dividing by zero, we encounter operations that are undefined in the arithmetic operations over real numbers. These results are called NaNs and are represented with an exponent of and a zero significand. NaNs can help with debugging, but they contaminate calculations e. The recommended approach to NaNs, especially for software designers or engineers early in their respective careers, is not to use NaNs.

Another variant of FP representation is denormalized numbers, also called denorms. These number representations were developed to remedy the problem of a gap among representable FP numbers near zero. This implies that the gap between zero and x is 2 and that the gap between x and y is 2 , as shown in Figure 3. Denorms: a Gap between zero and 2 , and b Denorms close this gap - adapted from [Maf01]. This situation can be remedied by omitting the leading one from the significand, thereby denormalizing the FP representation.

The smallest positive number is now the denorm 0. FP Arithmetic Applying mathematical operations to real numbers implies that some error will occur due to the floating point representation.

This is due to the fact that FP addition and subtraction are not associative, because the FP representation is only an approximation to a real number. Example 1. The difference occurs because the value 1. The preceding example leads to several implementational issues in FP arithmetic.

Firstly, rounding occurs when performing math on real numbers, due to lack of sufficient precision. For example, when multiplying two N-bit numbers, a 2N-bit product results. Since only the upper N bits of the 2N bit product are retained, the lower N bits are truncated. This is also called rounding toward zero. Another type of rounding is called rounding to infinity.

For example, 2. Conversely, if rounding toward -infinity, then we always round down. For example, 1. There is a more familiar technique, for example, where 3. In this case, we resolve rounding from n.

A second implementational issue in FP arithmetic is addition and subtraction of numbers that have nonzero significands and exponents.

Unlike integer addition, we can't just add the significands. Instead, one must: Denormalize the operands and shift one of the operands to make the exponents of both numbers equal we denote the exponent by E. Add or subtract the significands to get the resulting significand.

Normalize the resulting significand and change E to reflect any shifts incurred by normalization. We will review several approaches to floating point operations in MIPS in the following section. Single precision uses add. These instructions are much more complicated than their integer counterparts.

Problems with implementing FP arithmetic include inefficiencies in having different instructions that take significantly different times to execute e. Also, FP operations require much more hardware than integer operations. Thus, in the spirit of RISC design philosophy, we note that a a particular datum is not likely to change its datatype within a program, and b some types of programs do not require FP computation.

Most of these registers are specified in the. Double precision operands are stored in register pairs e.